Analog Devices (ADI) has unveiled a new 16-channel RF platform reference design, the Quad-MxFE Platform. This new platform consists of a small family of reference designs, starting with the ADQUADMXFE1EBZ and the ADQUADMXFE-CAL calibration board.  

The new 16TX/16RX Quad Mixed (Digital / Analog) Radio Front End.

The new 16TX/16RX quad mixed (digital/analog) radio front end. Image used courtesy of ADI
 

The Quad-MxFE platform is available as a complete reference design, including an RF signal chain, software architectures and application samples, and the power design architecture. The calibration board, which is also available, is programmable with MATLAB.

MATLAB algorithms allow users to confirm channelization metrics such as combined channel dynamic range, phase noise measurements, and most importantly, phase determinism. 

According to Analog Devices, this platform may be especially useful in aerospace and defense applications ranging from phased-array radars to SATCOM (satellite communications) on the ground.

ADI’s Quad-MxFE Specifications

At its core, this new digitizer (which is a conversion device with storage and conditioning) from ADI is a synchronized array of multiple analog-to-digital (ADCs) and digital-to-analog converter (DACs). The platform comes in two quad-array offerings, with the AD9081 or the AD9082 chipsets, which have 4D4A or 4D2A converters, respectively. 

Quad-MxFE's block diagram.

Quad-MxFE’s block diagram. Image used courtesy of ADI

Eight serializer/deserializers (SerDes) interface with a Xilinx Virtex Ultrascale+ FPGA (separate optional platform) operating at upwards of 24.75 Gbps/lane (JESD204C) or 15.5 Gbps/lane (JESD204B) to move digital data into and out of each of the four chips on the platform. 

Beamforming Technology Basics

Beamforming technology has seen massive investment over the past several years, with the military investing significant resources in phased-array technology. Applications can utilize both conventional RF and optical beamforming for real-time communications and electronic warfare (radar detection and characterization). 

Commercially, 5G has adopted phased arrays for increasing the perceived density of cellular coverage with the optimization of MIMO antenna systems.

Fundamentally, beamforming operates by introducing analog and digital delays into a coherent signal chain. These delays steer the direction of the aggregate main lobe propagating from the antenna superstructure. 

A phased array receiver with time delays used in beam-steering.

A phased array receiver with time delays used in beam-steering. Image used courtesy of Babur et al. 
 

The propagated signals will add constructively (and destructively) to generate (or receive) a wavefront in the direction of interest and suppress unwanted side lobes in the antenna pattern.

This procedure can be complicated, requiring strict timing constraints on the digitizer array. Each digitizer module’s phase must be deterministically quantified with respect to the other modules of the array to generate coherent and useful wavefronts. 

ADI tackles this complexity at the sub-system with multi-chip calibration algorithms and system-level with the calibration board. 

Multi-chip Synchronization Calibration and Phase Determinism

Electronically steering an antenna pattern using a phased array requires knowing each array element’s relationship (phase). Phase determinism does not require all phases to be the same—just that they be quantified so that software adjustment can be performed to align them.  

The AD9081/AD9082 can synchronize each digitizer chip in the complete system by reprogramming DSP blocks such as:

  • Numerically controlled oscillators (NCOs)
  • Programming finite impulse response blocks for phase and amplitude

A schematic of the multi-chip calibration between baseband FPGA and the MxFE platform.

A schematic of the multi-chip calibration between baseband FPGA and the MxFE platform. Image used courtesy of ADI
 

In the sub-assembly, two procedures are completed: NCO master-slave sync and a one-shot sync, which is used to prepare the array for the NCO master-slave sync. These procedures bring the system one step closer to phase determinism by aligning specific inputs.  

After those two procedures are completed, the phase-locked loops on the Quad-MxFE are calibrated for thermal drift with the calibration board. 

Calibration board (left) interfaced to MxFE board (middle) and Xilinx Virtex FPGA (right).

Calibration board (left) interfaced to MxFE board (middle) and Xilinx Virtex FPGA (right). Image used courtesy of ADI
 

ADI says its new reference design will help simplify prototyping and proliferation of advanced phased-array communication technology, especially for military, aerospace, and commercial applications.


Do you work with phased-array applications for telecommunications? What aspect interests you the most about this new mixed RF design? Let us know in the comments below.

This post was first published on: All About Circuits